PIC16F753 Datasheet, PDF (12/238 Pages) Microchip Technology – 14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F753/HV753
FIGURE 2-2:
DATA MEMORY MAP OF THE PIC16F753/HV753
BANK 0
INDF
00h
TMR0
01h
PCL
02h
STATUS 03h
FSR
04h
PORTA
05h
—
06h
PORTC
07h
IOCAF
08h
IOCCF
09h
PCLATH 0Ah
INTCON 0Bh
PIR1
0Ch
PIR2
0Dh
—
0Eh
TMR1L
0Fh
TMR1H
10h
T1CON
11h
T1GCON 12h
CCPR1L 13h
CCPR1H 14h
CCP1CON 15h
—
16h
—
17h
—
18h
—
19h
—
1Ah
—
1Bh
ADRESL 1Ch
ADRESH 1Dh
ADCON0 1Eh
ADCON1 1Fh
20h
GPRs “gpr0”
6Fh
70h
GPRs
“gprnobank”
7Fh
BANK 1
INDF
80h
OPTION_REG 81h
PCL
82h
STATUS 83h
FSR
84h
TRISA
85h
—
86h
TRISC
87h
IOCAP
88h
IOCCP
89h
PCLATH 8Ah
INTCON 8Bh
PIE1
8Ch
PIE2
8Dh
—
8Eh
OSCCON 8Fh
FVR1CON0 90h
DAC1CON0 91h
DAC1REFL 92h
DAC1REFH 93h
—
94h
—
95h
OPA1CON0 96h
—
97h
—
98h
—
99h
—
9Ah
CM2CON0 9Bh
CM2CON1 9Ch
CM1CON0 9Dh
CM1CON1 9Eh
CMOUT 9Fh
A0h
GPRS “gpr1”
BFh
C0h
Unimplemented
EFh
F0h
GPRs “gpr1s”
(mirrors
“gprnobank”)
FFh
BANK 2
INDF
100h
TMR0
101h
PCL
102h
STATUS 103h
FSR
104h
LATA
105h
—
106h
LATC
107h
IOCAN
108h
IOCCN
109h
PCLATH 10Ah
INTCON 10Bh
WPUA
10Ch
WPUC
10Dh
SLRCONC 10Eh
PCON
10Fh
TMR2
110h
PR2
111h
T2CON
112h
HLTMR1 113h
HLTPR1 114h
HLT1CON0 115h
HLT1CON1 116h
HLTMR2 117h
HLTPR2 118h
HLT2CON0 119h
HLT2CON1 11Ah
—
11Bh
—
11Ch
—
11Dh
SLPCCON0 11Eh
SLPCCON1 11Fh
120h
Unimplemented
GPRs “gpr2s”
(mirrors
“gprnobank”)
16Fh
170h
17Fh
Legend: = Unimplemented data memory locations, read as ‘0’.
BANK 3
INDF
180h
OPTION_REG 181h
PCL
182h
STATUS 183h
FSR
184h
ANSELA 185h
—
186h
ANSELC 187h
APFCON 188h
OSCTUNE 189h
PCLATH 18Ah
INTCON 18Bh
PMCON1 18Ch
PMCON2 18Dh
PMADRL 18Eh
PMADRH 18Fh
PMDATL 190h
PMDATH 191h
COG1PHR 192h
COG1PHF 193h
COG1BKR 194h
COG1BKF 195h
COG1DBR 196h
COG1DBF 197h
COG1CON0 198h
COG1CON1 199h
COG1RIS 19Ah
COG1RSIM 19Bh
COG1FIS 19Ch
COG1FSIM 19Dh
COG1ASD0 19Eh
COG1ASD1 19Fh
1A0h
Unimplemented
1EFh
GPRs “gpr2s”
(mirrors
“gprnobank”)
1F0h
1FFh
DS40001709A-page 12
Preliminary
 2013 Microchip Technology Inc.