PIC16F753 Datasheet, PDF (80/238 Pages) Microchip Technology – 14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F753/HV753
REGISTER 9-2: HLTxCON1: HLTx CONTROL REGISTER 1
R/W-0/0
R/W-0/0
U-0
R/W-0/0
R/W-0/0
HxFES
HxRES
—
HxERS<2:0>
bit 7
R/W-0/0
R/W-0/0
HxFEREN
R/W-0/0
HxREREN
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
bit 6
bit 5
bit 4-2
bit 1
bit 0
HxFES: Hardware Limit Timerx Falling Edge Sensitivity bit
1 = Edge sensitive
0 = Level sensitive
HxRES: Hardware Limit Timerx Rising Edge Sensitivity bit
1 = Edge sensitive
0 = Level sensitive
Unimplemented: Read as ‘0’
HxERS<2:0>: Hardware Limit Timerx External Reset Source Select bits
000 =
001 =
010 =
011 =
100 =
101 =
110 =
111 =
CCP1 Out
C1OUT
C2OUT
COG1FLT
COG1OUT0
COG1OUT1
Reserved - ‘0’ input
Reserved - ‘0’ input
HxFEREN: Hardware Limit Timerx Falling Event Reset Enable bit
1 = HLTMRx will reset on the first clock after a falling event of selected Reset source
0 = Falling events of selected source have no effect
HxREREN: Hardware Limit Timerx Rising Event Reset Enable bit
1 = HLTMRx will reset on the first clock after a rising event of selected Reset source
0 = Rising events of selected source have no effect
TABLE 9-1: SUMMARY OF REGISTERS ASSOCIATED WITH HLT
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON
—
—
DC1B<1:0>
CCP1M<3:0>
87
CM1CON0
C1ON
C1OUT
C1OE
C1POL
C1ZLF
C1SP
C1HYS C1SYNC
139
CM1CON1 C1INTP C1INTN
C1PCH<2:0>
C1NCH<2:0>
140
CM2CON0
C2ON
C2OUT
C2OE
C2POL
C2ZLF
C2SP
C2HYS C2SYNC
139
CM2CON1 C2INTP C2INTN
C2PCH<2:0>
C2NCH<2:0>
140
INTCON
GIE
PEIE
T0IE
INTE
IOCIE
T0IF
INTF
IOCIF
19
PIE1
TMR1GIE ADIE
—
—
HLTMR2IE HLTMR1IE TMR2IE TMR1IE
20
PIR1
TMR1GIF
ADIF
—
—
HLTMR2IF HLTMR1IF TMR2IF TMR1IF
22
HLTMRx
Holding Register for the 8-bit Hardware Limit TimerX Count
77*
HLTPRx
HLTMRx Module Period Register
77*
HLTxCON0
—
HxOUTPS<3:0>
HxON
HxCKPS<1:0>
79
HLTxCON1 HxFES
HxRES
—
HxERS<2:0>
HxFEREN HxREREN
80
Legend: — = unimplemented location, read as ‘0’. Shaded cells do not affect the HLT module operation.
* Page provides register information.
DS40001709A-page 80
Preliminary
 2013 Microchip Technology Inc.