PIC16F753 Datasheet, PDF (178/238 Pages) Microchip Technology – 14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F753/HV753
FIGURE 19-10: WAKE-UP FROM SLEEP THROUGH INTERRUPT
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
CLKIN
CLKOUT
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
TIOSCST
INT pin
INTF flag
(INTCON reg.)
Interrupt Latency⁽³⁾
GIE bit
(INTCON reg.)
Processor in
Sleep
Instruction Flow
PC
PC
Instruction
Fetched
Inst(PC) = Sleep
Instruction
Executed
Inst(PC – 1)
PC + 1
Inst(PC + 1)
Sleep
PC + 2
PC + 2
Inst(PC + 2)
Inst(PC + 1)
PC + 2
Dummy Cycle
0004h
Inst(0004h)
Dummy Cycle
0005h
Inst(0005h)
Inst(0004h)
Note 1: HFINTOSC Oscillator mode assumed.
2: GIE = ‘1’ assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = ‘0’, execution will continue in-line.
19.8 Code Protection
If the code protection bit(s) have not been
programmed, the on-chip program memory can be
read out using ICSP^™ for verification purposes.
Note:
The entire Flash program memory will be
erased when the code protection is turned
off. See the “PIC16F753/HV753 Flash
Memory Programming Specification”
(DS41686) for more information.
19.9 ID Locations
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
reported when using MPLAB^® IDE.
DS40001709A-page 178
Preliminary
 2013 Microchip Technology Inc.