XPGA Datasheet, PDF (75/89 Pages) Lattice Semiconductor – The ispXPGA architecture

Lattice Semiconductor
ispXPGA Family Data Sheet
ispXPGA Logic Signal Connections: 900-Ball fpBGA (Continued)
900 fpBGA
Ball
L2
L6
L5
M1
-
M2
L3
L4
M6
-
M5
M4
M3
N1
-
N2
N7
N6
P1
-
P2
N3
N4
P6
P5
P3
P4
R7
-
R6
R1
-
R2
-
R3
R4
R5
T3
T4
T5
-
T2
Signal Name
BK0_IO35
BK0_IO36
BK0_IO37
BK0_IO38
-
BK0_IO39
BK0_IO40
BK0_IO41
BK0_IO42
GND (Bank 0)
BK0_IO43
BK0_IO44
BK0_IO45
BK0_IO46
-
BK0_IO47
BK0_IO48
BK0_IO49
BK0_IO50
GND (Bank 0)
BK0_IO51
BK0_IO52
BK0_IO53
BK0_IO54
BK0_IO55
BK0_IO56
BK0_IO57
BK0_IO58
GND (Bank 0)
BK0_IO59
BK0_IO60
-
BK0_IO61
GND (Bank 0)
GCLK0
GCLK1
VCCP0
GNDP0
GCLK2
GCLK3
GND (Bank 1)
BK1_IO0
LFX1200
Second
Function
HSI1B_SINN
-
-
HSI2A_SOUTP
-
HSI2A_SOUTN
-
-
HSI2A_SINP
-
HSI2A_SINN
-
-
HSI2B_SOUTP
-
HSI2B_SOUTN
-
-
HSI2B_SINP
-
HSI2B_SINN
-
-
PLL_RST0
PLL_RST1
-
-
PLL_FBK0
-
PLL_FBK1
CLK_OUT0
-
CLK_OUT1
-
-
-
-
-
-
-
-
CLK_OUT2
LVDS Pair/
Polarity
17N
18P
18N
19P
-
19N
20P
20N
21P
-
21N
22P
22N
23P
-
23N
24P
24N
25P
-
25N
26P
26N
27P
27N
28P
28N
29P
-
29N
30P
-
30N
-
LVDCCLK0
LVDSCLK0
-
-
LVDSCLK1
LVDSCLK1
-
31P
Signal Name
BK0_IO15
BK0_IO16
BK0_IO17
BK0_IO18
GND (Bank 0)
BK0_IO19
BK0_IO20
BK0_IO21
BK0_IO22
-
BK0_IO23
BK0_IO24
BK0_IO25
BK0_IO26
GND (Bank 0)
BK0_IO27
BK0_IO28
BK0_IO29
BK0_IO30
-
BK0_IO31
BK0_IO32
BK0_IO33
BK0_IO38
BK0_IO35
BK0_IO36
BK0_IO39
BK0_IO34
GND (Bank 0)
BK0_IO37
BK0_IO40
GND (Bank 0)
BK0_IO41
-
GCLK0
GCLK1
VCCP0
GNDP0
GCLK2
GCLK3
-
BK1_IO0
LFX500
Second
Function
HSI0B_SINN
-
-
HSI1A_SOUTP
-
HSI1A_SOUTN
-
-
HSI1A_SINP
-
HSI1A_SINN
-
-
HSI1B_SOUTP
-
HSI1B_SOUTN
-
-
HSI1B_SINP
-
HSI1B_SINN
-
-
PLL_RST0
PLL_RST1
-
-
PLL_FBK0
-
PLL_FBK1
CLK_OUT0
-
CLK_OUT1
-
-
-
-
-
-
-
-
CLK_OUT2
LVDS Pair/
Polarity
7N
8P
8N
9P
-
9N
10P
10N
11P
-
11N
12P
12N
13P
-
13N
14P
14N
15P
-
15N
16P
16N
19P
17N
18P
19N
17P
-
18N
20P
-
20N
-
LVDSCLK0
LVDSCLK0
-
-
LVDSCLK1
LVDSCLK1
-
21P
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