XPGA Datasheet, PDF (36/89 Pages) Lattice Semiconductor – The ispXPGA architecture

Lattice Semiconductor
Serializer Timing (Continued)
10B/12B SERIALIZER DELAY TIMING
ispXPGA Family Data Sheet
TXD
REFCLK
SOUT
SYMBOL N
t_COSOUT
SYMBOL N+1
b4 b5 b6 b7 b8 b9 "0" "1" b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 "0" "1"
SYMBOL N-1
SYMBOL N
SS Mode SERIALIZER DELAY TIMING
TXD
REFCLK
SYMBOL N
t_COSOUT
SYMBOL N+1
SS_CLKOUT
t_CKOSOUT
t_SKTX
SOUT
b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0
SYMBOL N-1
SYMBOL N
SYMBOL
N+1
INTERNAL TIMING FOR sysHSI BLOCK
REFCLK
TXD
t_PWREFCLK
t_HSITXDDATAS
t_HSITXDDATAH
Deserializer Timing
8B/10B DESERIALIZER DELAY TIMING
SYMBOL N
SYMBOL N+1
SYMBOL N+2
SIN ^{b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b0 b1 b2 b3 b4 b5}
T_DSIN
RECCLK
RXD
SYMBOL N-1
SYMBOL N
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