XPGA Datasheet, PDF(35/89 Page) Lattice Semiconductor

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

XPGA Datasheet, PDF (35/89 Pages) Lattice Semiconductor – The ispXPGA architecture

◁

Lattice Semiconductor

Lock-in Timing (Continued)

CDR_8B10B LOCK-IN TIMING

SIN

120 Idle Pattern(480 TRCP)

CDRLOCK

SYDT

RXD(0:9)

tCDRLOCK

Idle Pattern

ispXPGA Family Data Sheet

DATA (SERIAL)

DATA (PARALLEL)

SYDT Timing

SYDT TIMING FOR CDRX_10B12B

RECCLK

SYDT

RXD(0:9)

SYNC PATTERN

Data0 Data1 Data2 Data3 Data4

Parallel Data

SYDT TIMING FOR CDRX_8B10B

RECCLK

SYDT

RXD(0:9)

K28.5 D21.4 D21.5 D21.5 K28.5 D21.4 D21.5 D21.5 D0 D1 D2

IDLE PATTERN

Data

Serializer Timing

8B/10B SERIALIZER DELAY TIMING

TXD

REFCLK

SYMBOL N

tCOSOUT

SYMBOL N+1

SOUT

b4 b5 b6 b7 b8 b9 b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b0 b1 b2

SYMBOL N-1

SYMBOL N

SYMBOL N+1

▷