XPGA Datasheet, PDF (41/89 Pages) Lattice Semiconductor – The ispXPGA architecture

Lattice Semiconductor
ispXPGA Family Data Sheet
Signal Descriptions¹
Signal Name
General Purpose
BKy_IOx^1,2
GCLKn/In ⁷
GSR
NC
GND
V_CC
V_CCJ
V_CCOy²
V_REFy²
D_XN, D_XP
Test and Program/Configuration
TMS
TCK
TDI
TDO
TOE
CFG0
PROGRAMb
DONE
INITb
READ
CCLK
CSb
DATA[0:7]
sysCLOCK PLL³
PLL_FBKz
PLL_RSTz
CLK_OUTz
PLL_LOCKz
GND_P
V_CCP
sysHSI Block^{4, 5}
HSImA_SINP, HSImB_SINP
HSImA_SINN, HSImB_SINN
HSImA_SOUTP, HSImB_SOUTP
HSImA_SOUTN, HSImB_SOUTN
HSImA_LOSS, HSImB_LOSS
HSImA_SYDT, HSImB_SYDT
HSImA_RECCLK, HSImB_RECCLK
HSImA_CDRLOCK, HSImB_CDRLOCK
Signal Type
Description
Input/Output
Input
Input
—
GND
VCC
VCC
VCC
Input
Output
General purpose I/O number x in I/O Bank y
Global clock/input⁸
Global Set/Reset
No Connect
Ground
Core logic power supply
IEEE 1149.1 TAP power supply
I/O Bank y power supply
I/O Bank y reference voltage
Temperature Sensing Diodes, provide a differential voltage, which
corresponds to the temperature of the device.
Input
Input
Input
Output
Input
Input
Input
Bi-directional
Bi-directional
Input
Input
Input
Bi-directional
Test Mode Select
Test Clock
Test Data In
Test Data Out
Test Output Enable tri-states all I/O pins
Selects the SRAM memory configuration type (Peripheral or
E²CMOS Refresh)
Initiates download from E²CMOS or the peripheral port to SRAM
memory (active low)
Indicates when configuration is complete
Indicates the device is ready for programming (active low)
Selects the READ operation when in sysCONFIG mode
sysCONFIG Configuration Clock
sysCONFIG Chip Select (active low)
sysCONFIG Peripheral Port Data I/O
Input
Optional external feedback
Input
Optional external M divider reset
Internal Signal Clock output (routable to any I/O)
Internal Signal Lock output (routable to any I/O)
GND
PLL Ground
VCC
PLL power supply
Input
P-side of differential serial data input
Input
N-side of differential serial data input
Output P-side of differential serial data output
Output N-side of differential serial data output
Internal Signal Detects loss of signal
Internal Signal Symbol alignment detect
Internal Signal Recovered clock
Internal Signal Indicates when the CDR circuit is locked
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