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QG80331M500SL9BE Datasheet, PDF (61/67 Pages) Intel Corporation – Intel 80331 I/O Processor Specification Update | |||
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Documentation Changes
Intel® 80331 I/O Processor
Documentation Changes
1.
Table 236 shows incorrect description for tWDL field
Problem:
tWDL field (bits 13:12) shows â00â equals DDR-II Type only.
Workaround: Should state âDDR-I Type onlyâ
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
2.
Processor Device ID should be removed
Problem:
Page 739, top of the table shows Processor Device ID Register.
Workaround: This register is no longer valid and should be removed, see specification clarification #7.
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
3.
Core Performance Monitoring Unit (CPMON) section is incorrect
Problem:
Incorrect and incomplete information regarding the Core Performance Monitoring Unit.
Workaround: Changes include additional control registers (Interrupt, Overflow, Event) and two more counter
(PMN2 and PMN3). See the Intel XScale® Core Developerâs Manual (273473), referred to in the
manual as âXSC2â core.
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
4.
UART FIFO Occupancy Register is read only
Problem:
Table 312 shows UART FIFO Occupancy register (UxFOR) as âread/writeâ.
Workaround: Needs to be changed to âread-onlyâ.
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
5.
Refresh Frequency Register table is incorrect
Problem:
The values listed in Table 230 are incorrect.
Workaround: Should be as follows:
333 MHz: 500h (7.8 µs value); A00h (15.6 µs value)
400 MHz: 600h (7.8 µs value); C00h (15.6 µs value)
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
6.
PBI interrupt should be removed
Problem:
PBI interrupt should not be included in the 80331 documentation.
Workaround: All references to the Peripheral Bus Unit Error Interrupt should be removed. This can be found in
Figure 116, INTCTL1.21, INTSTR1.21, IINTSRC1.21, FINTSRC1.21 and IPR3.
Affected Docs: Intel® 80331 I/O Processor Developerâs Manual
Specification Update
61
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