English
Language : 

I960 Datasheet, PDF (5/70 Pages) Intel Corporation – i960 RP/RD I/O PROCESSOR AT 3.3 VOLTS
TABLES
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Related Documentation ................................................................................................................. 1
80960Rx Instruction Set ................................................................................................................ 7
Signal Type Definition .................................................................................................................... 8
Signal Descriptions ........................................................................................................................ 9
Power Requirement, Processor Control and Test Signal Descriptions ....................................... 13
Interrupt Unit Signal Descriptions .................................................................................... ............ 14
PCI Signal Descriptions ............................................................................................... ................ 15
Memory Controller Signal Descriptions ....................................................................................... 18
DMA, APIC, I2C Units Signal Descriptions .................................................................................. 19
Clock Signal ................................................................................................................................. 20
ICE Signal Descriptions ............................................................................................................... 20
352-Lead HL-PBGA Package — Signal Name Order (Sheet 1 of 4) ........................................... 23
352-Lead HL-PBGA Pinout — Ballpad Number Order (Sheet 1 of 4) ......................................... 27
352-Lead HL-PBGA Package Thermal Characteristics ............................................................... 32
Heatsink Information .................................................................................................................... 33
Operating Conditions ................................................................................................................... 34
VDIFF Specification for Dual Power Supply Requirements (3.3 V, 5 V) ....................................... 34
DC Characteristics ....................................................................................................................... 35
ICC Characteristics ....................................................................................................................... 36
Input Clock Timings ..................................................................................................................... 37
Synchronous Output Timings ...................................................................................................... 37
Synchronous Input Timings ......................................................................................................... 38
Relative Output Timings .............................................................................................................. 39
Fast Page Mode Non-interleaved DRAM Output Timings ........................................................... 39
Fast Page Mode Interleaved DRAM Output Timings ................................................................... 40
EDO DRAM Output Timings ........................................................................................................ 40
BEDO DRAM Output Timings ...................................................................................................... 41
SRAM/ROM Output Timings ........................................................................................................ 41
Boundary Scan Test Signal Timings ............................................................................................ 42
APIC Bus Interface Signal Timings .............................................................................................. 42
I2C Interface Signal Timings ........................................................................................................ 43
Processor Device ID Register - PDIDR ...................................................................................... 64