I960 Datasheet, PDF (35/70 Pages) Intel Corporation – i960 RP/RD I/O PROCESSOR AT 3.3 VOLTS

i960^® Rx I/O Processor at 3.3 V
Ball #
V3
V4
V23
V24
V25
V26
W1
W2
W3
W4
W23
W24
W25
W26
Y1
Y2
Y3
Y4
Y23
Y24
Y25
Y26
AA1
AA2
AA3
AA4
AA23
AA24
AA25
AA26
AB1
AB2
AB3
Table 13. 352-Lead HL-PBGA Pinout — Ballpad Number Order (Sheet 3 of 4)
Signal
HOLDA
V_CC
V_SS
S_C/BE1#
S_SERR#
S_PAR
ICEBUS2
ICEBUS3
ICEBUS1
V_SS
V_CC
S_AD13
S_AD15
S_AD14
ICEBUS5
ICEBUS6
ICEBUS4
V_CC
V_SS
S_AD10
S_AD12
S_AD11
ICEBRK#
ICEMSG#
ICEBUS7
V_SS
V_CC
S_C/BE0#
S_AD9
S_AD8
ICEVLD#
ICECLK
ICELOCK#
Ball #
AB4
AB23
AB24
AB25
AB26
AC1
AC2
AC3
AC4
AC5
AC6
AC7
AC8
AC9
AC10
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AC26
AD1
AD2
Signal
V_CC
V_SS
S_AD5
S_AD7
S_AD6
ICEADS#
ICESEL#
MSGFRM#
V_SS
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
V_CC
V_SS
S_AD2
S_AD4
S_AD3
V_CC
DREQ#
Ball #
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AE1
AE2
AE3
AE4
AE5
AE6
AE7
AE8
AE9
Signal
DACK#
LOCK#/ONCE#
FAIL#
LRST#
P_INTC#
V_CC/V_SS (1)
P_AD31
P_AD28
P_AD25
P_IDSEL
P_AD21
P_AD18
P_C/BE2#
P_TRDY#
P_LOCK#
P_PAR
P_AD14
P_AD11
P_AD8
P_AD6
P_AD3
P_AD0
S_AD1
V_CC
V_CC
V_CC
STEST
NC
WIDTH/HLTD1/RETRY
P_INTB#
P_RST#
P_REQ#
P_AD29
NOTES:
1. Ball AD8 must be tied to either V_CC or V_SS.
ADVANCE INFORMATION
29