I960 Datasheet, PDF (48/70 Pages) Intel Corporation – i960 RP/RD I/O PROCESSOR AT 3.3 VOLTS

i960^® Rx I/O Processor at 3.3 V
4.4.3 Boundary Scan Test Signal Timings
Table 29. Boundary Scan Test Signal Timings
Symbol
Parameter
Min Max Units
Notes
T_BSF
T_BSCH
T_BSCL
T_BSCR
T_BSCF
T_BSIS1
TCK Frequency
TCK High Time
TCK Low Time
TCK Rise Time
TCK Fall Time
Input Setup to TCK — TDI,
TMS
0
0.5T_F MHz
15
ns Measured at 1.5 V (1)
15
ns Measured at 1.5 V (1)
5
ns 0.8 V to 2.0 V (1)
5
ns 2.0 V to 0.8 V (1)
4
ns
T_BSIH1
Input Hold from TCK — TDI,
6
ns
TMS
T_BSOV1 TDO Valid Delay
3
30
ns Relative to falling edge of TCK (2)
T_BSOF1
TDO Float Delay
3
30
ns Relative to falling edge of TCK (2)
T_BSOV2 All Outputs (Non-Test) Valid
3
Delay
30
ns Relative to falling edge of TCK (2)
T_BSOF2 All Outputs (Non-Test) Float
3
Delay
30
ns Relative to falling edge of TCK (2)
T_BSIS2
Input Setup to TCK — All
4
ns
Inputs (Non-Test)
T_BSIH2
Input Hold from TCK — All
6
ns
Inputs (Non-Test)
NOTES:
1. Not tested.
2. Outputs precharged to V_CC5 maximium.
4.4.4 APIC Bus Interface Signal Timings
Table 30. APIC Bus Interface Signal Timings (Sheet 1 of 2)
Symbol
T_APF
PICCLK Frequency
T_APC
PICCLK Period
T_APCH
PICCLK High Time
T_APCL
PICCLK Low Time
T_APCR
PICCLK Rise Time
T_APCF
PICCLK Fall Time
NOTES:
1. Not tested.
Parameter
Min Max Units Notes
2 16.66 MHz
60
500
ns
9
ns
9
ns
1
5
ns (1)
1
5
ns (1)
42
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