TLE94106EL Datasheet, PDF (64/75 Pages) Infineon Technologies AG – Six half bridge power outputs

TLE94106EL
Serial Peripheral Interface (SPI)
SYS_DIAG_2 : OP_ERROR_1_STAT
Overcurrent error status of half-bridge outputs 1 - 4 (Address Byte [OP]101 10[LABT]1_B)
D7
D6
D5
D4
D3
D2
D1
D0
HB4_HS_OC HB4_LS_OC HB3_HS_OC HB3_LS_OC HB2_HS_OC HB2_LS_OC HB1_HS_OC HB1_LS_OC
r
rc
rc
rc
rc
rc
rc
rc
rc
Field
Bits
HB4_HS_OC D7
HB4_LS_OC D6
HB3_HS_OC D5
HB3_LS_OC D4
HB2_HS_OC D3
HB2_LS_OC D2
HB1_HS_OC D1
HB1_LS_OC D0
Type
rc
rc
rc
rc
rc
rc
rc
rc
Description
High-side (HS) switch of half-bridge 4 overcurrent detection
0_B No error on HS4 switch (default value)
1_B Overcurrent detected on HS4 switch. Error latched and HS4
disabled.
Low-side (LS) switch of half-bridge 4 overcurrent detection
0_B No error on LS4 switch (default value)
1_B Overcurrent detected on LS4 switch. Error latched and LS4
disabled.
High-side (HS) switch of half-bridge 3 overcurrent detection
0_B No error on HS3 switch (default value)
1_B Overcurrent detected on HS3 switch. Error latched and HS3
disabled.
Low-side (LS) switch of half-bridge 3 overcurrent detection
0_B No error on LS3 switch (default value)
1_B Overcurrent detected on LS3 switch. Error latched and LS3
disabled.
High-side (HS) switch of half-bridge 2 overcurrent detection
0_B No error on HS2 switch (default value)
1_B Overcurrent detected on HS2 switch. Error latched and HS2
disabled.
Low-side (LS) switch of half-bridge 2 overcurrent detection
0_B No error on LS2 switch (default value)
1_B Overcurrent detected on LS2 switch. Error latched and LS2
disabled.
High-side (HS) switch of half-bridge 1 overcurrent detection
0_B No error on HS1 switch (default value)
1_B Overcurrent detected on HS1 switch. Error latched and HS1
disabled.
Low-side (LS) switch of half-bridge 1 overcurrent detection
0_B No error on LS1 switch (default value)
1_B Overcurrent detected on LS1 switch. Error latched and LS1
disabled.
Data Sheet
64
1.0
2016-09-08