TLE94106EL Datasheet, PDF (15/75 Pages) Infineon Technologies AG – Six half bridge power outputs

TLE94106EL
General Product Characteristics
Table 5
Electrical Characteristics, V_S =5.5 V to 18 V, V_DD = 3.0V to 5.5V, T_j = -40°C to +150°C, EN= HIGH,
I_OUTn= 0 A; Typical values refer to V_DD = 5.0 V, V_S = 13.5 V and T_J = 25 °C unless otherwise
specified; all voltages with respect to ground, positive current flowing into pin (unless
otherwise specified) (cont’d)
Parameter
Symbol
Values
Unit Note or
Min. Typ. Max.
Test Condition
Number
Output delay time high side
driver on
t_dONH
5
20 35 µs Resistive load = P_4.4.37
100Ω to GND
Output delay time high side
driver off
t_dOFFH
15 45 75 µs Resistive load = P_4.4.38
100Ω to GND
Output delay time low side
driver on
t_dONL
5
20 35 µs Resistive load = P_4.4.39
100Ω to VS
Output delay time low side
driver off
t_dOFFL
15 45 75 µs Resistive load = P_4.4.40
100Ω to VS
Cross current protection time, t_DHL
high to low
100 130 160 µs
Resistive load =
100Ω³⁾
P_4.4.41
Cross current protection time, t_DLH
low to high
100 130 160 µs
Resistive load =
100Ω³⁾
P_4.4.42
Input Interface: Logic Input EN
High-input voltage
V_ENH
0.7 * – –
V
–
V_DD
Low-input voltage
Hysteresis of input voltage
V_ENL
V_ENHY
–
– 0.3 * V
–
V_DD
–
500 –
mV ³⁾
Pull down resistor
R_{PD_EN}
20
40 70
kΩ V_EN = 0.2 x V_DD
SPI frequency
Maximum SPI frequency
f_SPI,max
–
–
5.0 MHz ^{3) 5)}
SPI INTERFACE: Delay Time from EN rising edge to first Data in
Setup time
t_set
–
– 150 µs ³⁾ See Figure 14
SPI INTERFACE: Input Interface, Logic Inputs SDI, SCLK, CSN
P_4.4.43
P_4.4.44
P_4.4.45
P_4.4.46
P_4.4.47
P_4.4.48
H-input voltage threshold
V_IH
L-input voltage threshold
V_IL
Hysteresis of input voltage
Pull up resistor at pin CSN
Pull down resistor at pin SDI,
SCLK
Input capacitance at pin CSN,
SDI or SCLK
V_IHY
R_{PU_CSN}
R_{PD_SDI,}
R_{PD_SCLK}
C_I
0.7 * – –
V
V_DD
–
– 0.3 * V
V_DD
–
500 –
mV
30 50 80 kΩ
20 40 70 kΩ
–
10 15 pF
–
P_4.4.50
–
P_4.4.51
3)
P_4.4.52
V_CSN = 0.7 x V_DD
P_4.4.53
V_SDI, V_SCLK = 0.2 x V_DD P_4.4.54
0V < V_DD < 5.25V ³⁾ P_4.4.55
Input Interface, Logic Output SDO
H-output voltage level
V_SDOH
V_DD - V_DD - –
V
I_SDOH = -1.6 mA
P_4.4.56
0.4 0.2
Data Sheet
15
1.0
2016-09-08