TLE94106EL Datasheet, PDF (6/75 Pages) Infineon Technologies AG – Six half bridge power outputs

TLE94106EL
Pin Configuration
Pin Symbol
Function
13
N.C.
Not connected. This pin should either be left open or terminated to ground (e.g. for
layout compatibility with TLE94112EL, TLE94110EL or TLE94108EL).
14
OUT 3
Power half-bridge 3
15
N.C.
Not connected. This pin should either be left open or terminated to ground.
16
VS1
Main supply voltage for power half bridges. VS1 should be externally connected to
VS2.
17
N.C.
Not connected. This pin should either be left open or terminated to ground.
18
N.C.
Not connected. This pin should either be left open or terminated to ground.
19
CSN
Chip select Not input with internal pull up
20
SCLK
Serial clock input with internal pull down
21
VS2
Main supply voltage for power half bridges. VS1 should be externally connected to
VS2.
22
N.C.
Not connected. This pin should either be left open or terminated to ground.
23
OUT 2
Power half-bridge 2
24
N.C.
Not connected. This pin should either be left open or terminated to ground (e.g. for
layout compatibility with TLE94112EL, TLE94110EL or TLE94108EL).
EDP -
Exposed Die Pad; For cooling and EMC purposes only - not usable as electrical
ground. Electrical ground must be provided by pins 1,12.¹⁾
1) The exposed die pad at the bottom of the package allows better heat dissipation from the device via the PCB. The
exposed pad (EP) must be either left open or connected to GND. It is recommended to connect EP to GND for best
EMC and thermal performance.
Data Sheet
6
1.0
2016-09-08