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TLE94106EL Datasheet, PDF (53/75 Pages) Infineon Technologies AG – Six half bridge power outputs
TLE94106EL
Serial Peripheral Interface (SPI)
7.6.1 Control register definition
HB_ACT_1_CTRL
Half-bridge output control 1 (Address Byte [OP] 000 00[LABT]1B)
D7
D6
D5
D4
D3
D2
D1
D0
HB4_HS_EN HB4_LS_EN HB3_HS_EN HB3_LS_EN HB2_HS_EN HB2_LS_EN HB1_HS_EN HB1_LS_EN
r
rw
rw
rw
rw
rw
rw
rw
rw
Field
Bits
HB4_HS_EN D7
HB4_LS_EN D6
HB3_HS_EN D5
HB3_LS_EN D4
HB2_HS_EN D3
HB2_LS_EN D2
HB1_HS_EN D1
HB1_LS_EN D0
Type
rw
rw
rw
rw
rw
rw
rw
rw
Description
Half-bridge output 4 high side switch enable
0B HS4 OFF/ High-Z (default value)
1B HS4 ON
Half-bridge output 4 low side switch enable
0B LS4 OFF/ High-Z (default value)
1B LS4 ON
Half-bridge output 3 high side switch enable
0B HS3 OFF/ High-Z (default value)
1B HS3 ON
Half-bridge output 3 low side switch enable
0B LS3 OFF/ High-Z (default value)
1B LS3 ON
Half-bridge output 2 high side switch enable
0B HS2 OFF/ High-Z (default value)
1B HS2 ON
Half-bridge output 2 low side switch enable
0B LS2 OFF/ High-Z (default value)
1B LS2 ON
Half-bridge output 1 high side switch enable
0B HS1 OFF/ High-Z (default value)
1B HS1 ON
Half-bridge output 1 low side switch enable
0B LS1 OFF/ High-Z (default value)
1B LS1 ON
Note:
The simultaneous activation of both HS and LS switch within a half-bridge is prevented by the
digital block to avoid cross current. If both LS_EN and HS_EN bits of a given half-bridge are set, the
logic turns off this half-bridge.
Data Sheet
53
1.0
2016-09-08