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TLE94106EL Datasheet, PDF (33/75 Pages) Infineon Technologies AG – Six half bridge power outputs
TLE94106EL
Half-Bridge Outputs
6.2.2 Cross-Current
In bridge configurations the high-side and low-side power transistors are ensured never to be simultaneously
“ON” to avoid cross currents. This is achieved by integrating delays in the driver stage of the power outputs to
create a dead-time between switching off of one power transistor and switching on of the adjacent power
transistor within the half-bridge. The dead times, tDHL and tDLH, as shown in Figure 9 case 3 and Figure 10 case
3, have been specified to ensure that the switching slopes do not overlap with each other. This prevents a cross
conduction event.
CSN
t
Case 1: Delay Time High Side Driver OFF
Previous State Æ New State
VOUT_HSx [V]
HS ON Æ HS OFF
LS OFF Æ LS OFF
VS
80%
tdOFFH 1)
20%
GND
t
1) Delay time HS OFF
Case 2: Delay Time Low Side Driver ON
Previous StateÆ New State
HS OFF Æ HS OFF
LS OFF Æ LS ON
VOUT_LSx [V]
VS
80%
tdONL2)
20%
GND
t
2) Delay time LS ON without dead time ; HS previously OFF
Case 3: Delay Time Low Side Driver ON with tDHL dead time
Previous State Æ New State
VOUT_LSx [V]
HS ON Æ HS OFF
LS OFF Æ LS ON
VS
Low-Side
ON
delay time
tdONL + tDHL3)
80%
GND
20%
t
3) Delay time LS ON with dead time ; HS previously ON
Figure 9 Half bridge outputs switching times - high-side to low-side transition
Data Sheet
33
1.0
2016-09-08