TLE94106EL Datasheet, PDF (39/75 Pages) Infineon Technologies AG – Six half bridge power outputs

TLE94106EL
Serial Peripheral Interface (SPI)
EN
EN
t_SET
SPI
SPI
A) SPI message ignored
B) SPI message accepted
Figure 14 Setup time from EN rising edge to first SPI communication
CSN
SCLK
SDI
t _lead
t_{pC L K}
t_SCLKH
t _SCLKL
t_{S DI_setup}
t_{S DI_hold}
t_{EN SD O}
t_VASDO
SDO
Figure 15 SPI Data Timing
t_lag
t_{C SN H}
t _DISSDO
0.8V_DD
0.2V_DD
0.8VDD
0.2V_DD
0.8V_DD
0.2V_DD
0.8V_DD
0.2V_DD
7.1.1 Global Error Flag
A logic OR combination between Global Error Flag (GEF) and the signal present on SDI is reported on SDO
between a CSN falling edge and the first SCLK rising edge (Figure 13). GEF is set if a fault condition is detected
or if the device comes from a Power On Reset (POR).
Note:
The SDI pin of all devices in daisy chain or non daisy chain mode must be Low at the beginning of the
SPI frame (between the CSN falling edge and the first SCLK rising edge).
It is possible to check if the TLE94106EL has detected a fault by reading the GEF without SPI clock pulse
(Figure 16).
Data Sheet
39
1.0
2016-09-08