HYB25D256161CE Datasheet, PDF (61/72 Pages) Infineon Technologies AG – 16M x 16 Double Data Rate Graphics DRAM

HYB25D256161CE-[4/5]
256-Mbit Double Data Rate SGRAM
Timing Diagrams
Figure 37 Power Down Mode
Note:
1. No column accesses are allowed to be in progress at the time power down is entered.
2. * = If this command is a Precharge (or if the device is already in the idle state) then the power down mode
shown is Precharge power down. If this command is an Active (or if at least one row is already active), then
the power down mode shown is Active power down.
3. The Timing reference is shown with respect to Vref-Crossing.
Datasheet
61
Rev.1.0, 2004-02