HYB25D256161CE Datasheet, PDF (46/72 Pages) Infineon Technologies AG – 16M x 16 Double Data Rate Graphics DRAM

HYB25D256161CE-[4/5]
256-Mbit Double Data Rate SGRAM
Functional Description
7) Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads
or Writes with Auto Precharge disabled.
8) Requires appropriate DM masking.
9) Concurrent Auto Precharge:
This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto precharge is
enabled any command may follow to the other banks as long as that command does not interrupt the read or write data
transfer and all other limitations apply (e.g. contention between READ data and WRITE data must be avoided). The
minimum delay from a read or write command with auto precharge enable, to a command to a different banks is
summarized in Table 10.
10) A Write command may be applied after the completion of data output.
Table 10 Truth Table 5: Concurrent Auto Precharge
From Command
To Command (different bank)
WRITE w/AP
Read w/AP
Read or Read w/AP
Write to Write w/AP
Precharge or Activate
Read or Read w/AP
Write or Write w/AP
Precharge or Activate
Minimum Delay with Concurrent
Auto Precharge Support
1 + (BL/2) + t_WTR
BL/2
1
BL/2
CL (rounded up) + BL/2
1
Unit
t_CK
t_CK
t_CK
t_CK
t_CK
t_CK
Datasheet
46
Rev.1.0, 2004-02