HYB25D256161CE Datasheet, PDF (55/72 Pages) Infineon Technologies AG – 16M x 16 Double Data Rate Graphics DRAM

HYB25D256161CE-[4/5]
256-Mbit Double Data Rate SGRAM
Electrical Characteristics
Table 17 AC Operating Conditions¹⁾
Parameter
Input High (Logic 1) Voltage, DQ, DQS and DM Signals
Input Low (Logic 0) Voltage, DQ, DQS and DM Signals
Input Differential Voltage, CK and CK Inputs
Input Closing Point Voltage, CK and CK Inputs
Symbol
Min.
Values
Max.
Unit Note/
Test
Condition
V_IH(AC)
V_IL(AC)
V_ID(AC)
V_IX(AC)
V_REF + 0.31 —
V
—
V_REF – 0.31 V
0.7
V_DDQ + 0.6 V
0.5 × V_DDQ 0.5 × V_DDQ V
– 0.2
+ 0.2
2)3)
2)3)
2)3)4)
2)3)5)
1) V_DDQ = 2.6 V ± 0.1 V, V_DD = +2.6 V ± 0.1 V ; 0 °C ≤ T_A ≤ 70 °C
2) Input slew rate = 1 V/ns.
3) Inputs are not recognized as valid until V_REF stabilizes.
4) V_ID is the magnitude of the difference between the input level on CK and the input level on CK.
5) The value of V_IX is expected to equal 0.5 × V_DDQ of the transmitting device and must track variations in the DC level of the
same.
Table 18 Electrical Characteristics and AC Timing - Absolute Specifications –4/–5 ¹⁾
Parameter
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
Clock Half Period
Clock cycle time
DQ and DM input hold time
DQ and DM input setup time
Control and Addr. input pulse width
(each input)
DQ and DM input pulse width (each
input)
Data-out high-impedance time from
CK/CK
Data-out low-impedance time from
CK/CK
Write command to 1^st DQS latching
transition
DQS-DQ skew (DQS and associated
DQ signals)
Data hold skew factor
Symbol
–4
Min. Max.
t_AC
t_DQSCK
t_CH
t_CL
t_HP
t_CK
t_DH
t_DS
t_IPW
–0.6 +0.6
–0.65 +0.65
0.45 0.55
0.45 0.55
min. (t_CL, t_CH)
4
12
0.4 —
0.4 —
2.2 —
–5
Min. Max.
–0.65 +0.65
–0.65 +0.65
0.45 0.55
0.45 0.55
min. (t_CL, t_CH)
5
12
0.4 —
0.4 —
2.2 —
Unit
ns
ns
t_CK
t_CK
ns
ns
ns
ns
ns
Note/Test Condition
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
CL = 3.0^2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)6)
t_DIPW
1.75 —
1.75 —
ns
2)3)4)5)6)
t_HZ
–0.7 0.7
–0.7 +0.7 ns ^2)3)4)5)7)
t_LZ
–0.7 0.7
–0.7 +0.7 ns ^2)3)4)5)7)
t_DQSS
0.85 1.15 0.75 1.25 t_CK ^2)3)4)5)
t_DQSQ
—
t_QHS
—
0.5 —
0.4 —
0.5 ns P-TSOPII-66-1
2)3)4)5)
0.5 ns P-TSOPII-66-1
2)3)4)5)
DQ/DQS output hold time
t_QH
t_HP – —
t_QHS
DQS input low (high) pulse width (write t_DQSL,H 0.35 —
cycle)
t_HP – —
t_QHS
0.35 —
ns
2)3)4)5)
t_CK
2)3)4)5)
Datasheet
55
Rev.1.0, 2004-02