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HYB25D256400BT Datasheet, PDF (51/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B
HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Operating Conditions
Absolute Maximum Ratings
Symbol
Parameter
VIN, VOUT Voltage on I/O pins relative to VSS
VIN
Voltage on Inputs relative to VSS
VDD
Voltage on VDD supply relative to VSS
Rating
-0.5 to VDDQ+ 0.5
-0.5 to +3.6
-0.5 to +3.6
Units
V
V
V
VDDQ
TA
TSTG
PD
IOUT
Voltage on VDDQ supply relative to VSS
Operating Temperature (Ambient)
Storage Temperature (Plastic)
Power Dissipation
Short Circuit Output Current
-0.5 to +3.6
V
0 to +70
°C
-55 to +150
°C
1.0
W
50
mA
Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sec-
tions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Input and Output Capacitances
Parameter
Input Capacitance: CK, CK
Delta Input Capacitance CK, CK
Input Capacitance: All other input-only pins
Delta Input Capacitance: All other input-only pins
Input/Output Capacitance: DQ, DQS, DM
Delta Input/Output Capacitance : DQ, DQS, DM
Package
TSOP
BGA
TSOP
BGA
TSOP
BGA
TSOP
BGA
TSOP
BGA
TSOP
BGA
Symbol
CI1
CdI1
CI2
CdI2
CIO
CdIO
Min.
2.0
1.5
-
-
2.0
1.5
-
-
4.0
3.5
-
-
Max.
3.0
2.5
0.25
0.25
3.0
2.5
0.5
0.5
5.0
4.5
0.5
0.5
Units
pF
Notes
1
pF
1
pF
1
pF
1
pF
1, 2
pF
1
1. These values are guaranteed by design and are tested on a sample base only. VDDQ = VDD = 2.5V ± 0.2V, f = 100MHz, TA = 25°C,
VOUT (DC) = VDDQ/2, VOUT (Peak to Peak) 0.2V. Unused pins are tied to ground .
2. DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching
at the board level
Page 51 of 77
2003-01-09, V1.1