HYB25D256400BT Datasheet, PDF (11/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Mode Register Operation
BA1 BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Bus
0* 0*
Operating Mode
CAS Latency
BT
Burst Length
Mode Register
A12 - A9
0
0
0
-
A8 A7
00
10
01
--
A6 - A0
Valid
Valid
Operating Mode
Normal operation
Do not reset DLL
Normal operation
in DLL Reset
Reserved
Reserved
A3
Burst Type
0
Sequential
1
Interleave
CAS Latency
A6 A5 A4
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Latency
Reserved
Reserved
2
3 (optional)
Reserved
1.5 (optional)
2.5
Reserved
Burst Length
A2
A1
A0
Burst Length
0
0
0
Reserved
0
0
1
2
0
1
0
4
0
1
1
8
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Reserved
1
1
1
Reserved
* BA0 and BA1 must be 0, 0 to select the Mode Register
(vs. the Extended Mode Register).
Page 11 of 77
2003-01-09, V1.1