HYB25D256400BT Datasheet, PDF (34/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Write to Write: Max DQSS, Non-Consecutive (Burst Length = 4)
CK
CK
Command
Address
DQS
DQ
DM
T1
T2
T3
Write
NOP
BAa, COL b
t_DQSS (max)
DI a-b
NOP
T4
Write
BAa, COL n
T5
NOP
DI a-n
DI a-b, etc. = data in for bank a, column b, etc.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
3 subsequent elements of data in are applied in the programmed order following DI a-n.
A non-interrupted burst is shown.
Each Write command may be to any bank.
Don’t Care
Page 34 of 77
2003-01-09, V1.1