HYB25D256400BT Datasheet, PDF (48/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Truth Table 4: Current State Bank n - Command to Bank m (Different bank)
Current State CS RAS CAS WE
Command
Action
H
X
X
X
Any
L
H
H
H
Deselect
No Operation
NOP/continue previous operation
NOP/continue previous operation
Idle
X
X
X
X
Any Command Otherwise
Allowed to Bank m
L
L
H
H
Row Activating, _L
H
L
H
Active, or
Precharging
L
H
L
L
L
L
H
L
Active
Read
Write
Precharge
Select and activate row
Select column and start Read burst
Select column and start Write burst
Read
L
L
H
H
(Auto Precharge L
H
L
H
Disabled)
L
L
H
L
Active
Read
Precharge
Select and activate row
Select column and start new Read burst
L
L
H
H
Write
L
H
L
H
(Auto Precharge
Disabled)
L
H
L
L
L
L
H
L
Active
Read
Write
Precharge
Select and activate row
Select column and start Read burst
Select column and start new Write burst
L
L
H
H
Active
Select and activate row
Read (With
L
H
L
H
Auto Precharge) _L
H
L
L
Read
Write
Select column and start new Read burst
Select column and start Write burst
L
L
H
L
Precharge
L
L
H
H
Active
Select and activate row
Write (With
L
H
L
H
Auto Precharge) _L
H
L
L
Read
Write
Select column and start Read burst
Select column and start new Write burst
L
L
H
L
Precharge
Notes
1-6
1-6
1-6
1-6
1-7
1-7
1-6
1-6
1-7
1-6
1-6
1-8
1-7
1-6
1-6
1-7,10
1-7,9,10
1-6
1-6
1-7,10
1-7,10
1-6
1. This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Truth Table 2: Clock Enable (CKE) and after t_{XSNR /} t_XSRD
has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands shown
are those allowed to be issued to bank m (assuming that bank m is in such a state that the given command is allowable). Excep-
tions are covered in the notes below.
3. Current state definitions:
Idle:
Row Active:
The bank has been precharged, and t_RP has been met.
A row in the bank has been activated, and t_RCD has been met. No data bursts/accesses and no register
accesses are in progress.
Read:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write:
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Read with Auto Precharge Enabled: See note 10.
Write with Auto Precharge Enabled: See note 10.
4. AUTO REFRESH and Mode Register Set commands may only be issued when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current state only.
6. All states and sequences not shown are illegal or reserved.
7. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes
with Auto Precharge disabled.
8. Requires appropriate DM masking.
9. A Write command may be applied after the completion of data output.
10. Concurrent Auto Precharge:
This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto precharge is enabled any
command may follow to the other banks as long as that command does not interrupt the read or write data transfer and all other
limitations apply (e.g. contention between READ data and WRITE data must be avoided). The mimimum delay from a read or write
command with auto precharge enable, to a command to a different banks is summarized in table 5.
Page 48 of 77
2003-01-09, V1.1