HYB25D256400BT Datasheet, PDF (47/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Truth Table 3: Current State Bank n - Command to Bank n (Same Bank)
Current State
Any
CS RAS CAS WE
H
X
X
X
L
H
H
H
L
L
H
H
Idle
L
L
L
H
L
L
L
L
L
H
L
H
Row Active
L
H
L
L
L
L
H
L
Read
L
H
L
H
(Auto Precharge L
L
H
L
Disabled)
L
H
H
L
Write
L
H
L
H
(Auto Precharge L
H
L
L
Disabled)
L
L
H
L
Command
Deselect
No Operation
Active
AUTO REFRESH
MODE REGISTER SET
Read
Write
Precharge
Read
Precharge
BURST TERMINATE
Read
Write
Precharge
Action
NOP. Continue previous operation
NOP. Continue previous operation
Select and activate row
Select column and start Read burst
Select column and start Write burst
Deactivate row in bank(s)
Select column and start new Read burst
Truncate Read burst, start Precharge
BURST TERMINATE
Select column and start Read burst
Select column and start Write burst
Truncate Write burst, start Precharge
Notes
1-6
1-6
1-6
1-7
1-7
1-6, 10
1-6, 10
1-6, 8
1-6, 10
1-6, 8
1-6, 9
1-6, 10, 11
1-6, 10
1-6, 8, 11
1. This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Truth Table 2: Clock Enable (CKE) and after t_{XSNR /} t_XSRD
has been met (if the previous state was self refresh).
2. This table is bank-specific, except where noted, i.e., the current state is for a specific bank and the commands shown are those
allowed to be issued to that bank when in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle:
Row Active:
The bank has been precharged, and t_RP has been met.
A row in the bank has been activated, and t_RCD has been met. No data bursts/accesses and no register
accesses are in progress.
Read:
A Read burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
Write:
A Write burst has been initiated, with Auto Precharge disabled, and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank.
Precharging:
Starts with registration of a Precharge command and ends when t_RP is met. Once t_RP is met, the bank is in the
idle state.
Row Activating: Starts with registration of an Active command and ends when t_RCD is met. Once t_RCD is met, the bank is in the
“row active” state.
Read w/Auto Precharge Enabled: Starts with registration of a Read command with Auto Precharge enabled and ends when t_RP
has been met. Once t_RP is met, the bank is in the idle state.
Write w/Auto Precharge Enabled: Starts with registration of a Write command with Auto Precharge enabled and ends when t_RP
has been met. Once t_RP is met, the bank is in the idle state.
Deselect or NOP commands, or allowable commands to the other bank should be issued on any clock edge occurring during these
states. Allowable commands to the other bank are determined by its current state and according Truth Table 4.
5. The following states must not be interrupted by any executable command; Deselect or NOP commands must be applied on each
positive clock edge during these states.
Refreshing:
Starts with registration of an Auto Refresh command and ends when t_RFC is met. Once t_RFC is met, the DDR
SDRAM is in the “all banks idle” state.
Accessing Mode Register: Starts with registration of a Mode Register Set command and ends when t_MRD has been met. Once
t_MRD is met, the DDR SDRAM is in the “all banks idle” state.
Precharging All: Starts with registration of a Precharge All command and ends when t_RP is met. Once t_RP is met, all banks is in
the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all/any banks are to be precharged, all/any must be in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent Read burst, regardless of bank.
10. Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes
with Auto Precharge disabled.
11. Requires appropriate DM masking.
Page 47 of 77
2003-01-09, V1.1