HYB25D256400BT Datasheet, PDF (32/77 Pages) Infineon Technologies AG – 256-Mbit Double Data Rate SDRAM, Die Rev. B

HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM, Die Rev. B
Write Burst (Burst Length = 4)
CK
CK
Command
Address
DQS
DQ
DM
T1
T2
Write
NOP
BA a, COL b
t_DQSS (max)
Dla-b
Maximum DQSS
T3
T4
NOP
NOP
CK
CK
Command
Address
DQS
DQ
DM
T1
T2
Write
BA a, COL b
t_DQSS (min)
NOP
Dla-b
Minimum DQSS
T3
T4
NOP
NOP
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
A10 is Low with the Write command (Auto Precharge is disabled).
Don’t Care
Page 32 of 77
2003-01-09, V1.1