HYB25D128323C Datasheet, PDF (44/53 Pages) Infineon Technologies AG – 128 Mbit DDR SGRAM

Table 16 Pin Capacitances
Pin
DQ0.. DQ31, DQS0 .. DQS3
DM0.. DM3
HYB25D128323C[-3/-3.3/-3.6/-4.5/-5.0/L3.6/L4.5]
128 Mbit DDR SGRAM [4M x 32]
Electrical Characteristics
min.
1.0
1.0
max.
Unit
3.0
pF
3.0
pF
Table 17 Timing Parameters for speed sorts –3, –3.3, –3.6, –4.5, and –5
Part Number Extension
–3
–3.3
–3.6
–4.5
–5
Unit Note¹⁾
Interface
MIM
MIM
MIM
WM/MIM WM/MIM — ²⁾
Parameter
Symbol min. max. min. max. min. max. min. max. min. max. — —
Clock and Clock Enable
Clock Cycle Time t_CK
t_CK
System frequency f_CK
f_CK
Clock high level
t_CH
width
Clock low level width t_CL
Minimum clock half t_HP
period
3.0 5.0
4.0 5.0
200 333
200 250
0.45 0.55
3.3 5.0
4.0 5.0
200 300
200 250
0.45 0.55
3.6 5.0
4.2 5.0
200 278
200 238
0.45 0.55
4.5 5.5
4.5 5.5
183 222
183 222
0.45 0.55
5.0 5.5
5.0 5.5
183 200
183 200
0.45 0.55
ns CL = 4
ns CL = 3
MHz CL = 4
MHz CL = 3
t_CK —
0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55 t_CK —
t_CH, —
t_CL
t_CH, —
t_CL
t_CH, —
t_CL
t_CH, —
t_CL
t_CH, —
t_CL
t_CK —
Command and Address Setup and Hold Times
Address and
t_IS
Command input
setup time
Address and
t_IH
Command input hold
time
0.65 — 0.65 —
0.65 — 0.65 —
0.75 —
0.75 —
1.0 —
1.0 —
1.0 —
1.0 —
ns —
ns —
Common Parameters
Row Cycle Time
t_RC
Row Cycle Time in t_RFC
Auto Refresh
Row Active Time t_RAS
ACTIVE to READ t_RAP
with Auto precharge
command
Row Precharge
t_RP
Time
Activate(a) to
t_RRD
Activate(b)
Command period
CAS(a) to CAS(b) t_CCD
Command period
Last data in to Active t_DAL
(t_WR + t_RP)
39 —
45 —
42.9 —
49.5 —
46.8 —
54 —
54 —
63 —
60 —
70 —
ns —
ns —
27 15.7k 29.7 15.7k 32.4 15.7k 36 15.7k 40 15.7k ns —
t_{RAS (min.)}- (burst length * t_CK /2)
ns —
12 — 13.2 — 14.4 — 18 — 20 — ns —
9.0 — 9.0 — 9.0 — 9.0 — 9.0 — ns —
1
—1
—1
—
1
—
1
—
t_CK —
6
—6
—6
—
6
—
6
—
t_CK —
Data Sheet
44
V1.7, 2003-07