HYB25D128323C Datasheet, PDF (29/53 Pages) Infineon Technologies AG – 128 Mbit DDR SGRAM

HYB25D128323C[-3/-3.3/-3.6/-4.5/-5.0/L3.6/L4.5]
128 Mbit DDR SGRAM [4M x 32]
Register Set
CLK
Command
READA
NOP
CL = 2
DQSx
CAS latency = 2
DQx
CL = 3
NOP
NOP
NOP
D-out D-out D-out D-out
0
1
2
3
NOP
NOP
ACT
DQSx
CAS latency = 3
DQx
CL = 4
DQSx
CAS latency = 4
DQx
BL / 2
Burst length = 4
Begin of
Autoprecharge
D-out D-out D-out D-out
0
1
2
3
D-out D-out D-out D-out
0
1
2
3
tRP
Bank can be activated after
completion of precharge
Figure 21 Read Burst with Autoprecharge
Data Sheet
29
V1.7, 2003-07