HYB25D128323C Datasheet, PDF (4/53 Pages) Infineon Technologies AG – 128 Mbit DDR SGRAM

HYB25D128323C[-3/-3.3], HYB25D128323C[-3.6/L3.6], HYB25D128323C[-4.5/L4.5], HYB25D128323C-5
Revision History:
V1.7
2003-07
Previous Version:
V1.51
2002-07
Page
Subjects (major changes since last revision)
all
new data sheet template
43
AC Operation Conditions: Input Slew Rate added
46
Timing Parameters for speed sorts –3, –3.3, –3.6, –4.5, and –5: Write DQS High/Low added
48
Timing Parameters for speed sorts L3.6 and L4.5: Write DQS High/Low added
Previous Version:
V1.51
2002-07
9, 13, 42, 46, extended V_DD range for –3.6 and L3.6
48
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Template: mp_a4_v2.0_2003-06-06.fm