HYB25D128323C Datasheet, PDF (41/53 Pages) Infineon Technologies AG – 128 Mbit DDR SGRAM

HYB25D128323C[-3/-3.3/-3.6/-4.5/-5.0/L3.6/L4.5]
128 Mbit DDR SGRAM [4M x 32]
Register Set
3.9
DDR SGRAM Simplified State Diagram
SELF
REFRESH
SREFEN
SREFEX
MODE
REGISTER
SET
MRS
IDLE
AREF
AUTO
REFRESH
CKEL
ACT
CKEH
CKEH
POWER
DOWN
ROW
ACTIVE
CKEL
WRITE
WRITEA
BST
READ
READA
WRITE
READ
READ
WRITEA
WRITEA
PRE
READA
READA
READA
PRE
PRE
POWER PRE
ON
PRE
CHARGE
Figure 30 DDR SGRAM Simplified State Diagram
Data Sheet
41
Automatic Sequence
Command Sequence
V1.7, 2003-07