IC-MN_16 Datasheet, PDF (46/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev F2, Page 46/62
• Temperature and signal level errors are indicated
directly at the NERR pin. These errors are only
signaled via the error bit if they are active at the
point when data is accepted into the output shift
register.
All errors which occur during operation are stored in
the status register regardless of the configuration of the
error/warning bit (see page 43).
Visibility Of Latched Status Messages
Parameter S2WRN enables status messages config-
ured to the warning bit using CFGEW and stored in the
status register to be output to the warning bit. In this
instance the warning bit is set until the relevant status
register is read out. Parallel to S2WRN the behavior
of the error bit and the NERR pin can be influenced by
S2ERR.
S2WRN
Code
0
1
Addr. 0x43; bit 2
Visibility for warning bit
Current messages configured to the warning bit
As above, or-gated with latched status messages
which are configured to the warning bit
Table 81: Visibility for warning bit
S2ERR
Code
0
1
Addr. 0x43; bit 3
Visibility for error bit and NERR
Current messages configured to the error bit
As above, or-gated with latched status messages
which are configured to the error bit
Table 82: Visibility for error bit (and NERR pin)