IC-MN_16 Datasheet, PDF (17/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
REGISTER MAP (EEPROM)
Rev F2, Page 17/62
OVERVIEW
Addr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Signal Conditioning Master Channel
0x00
GFC_M
GR_M
0x01
GFS_M(7:0)
0x02
MPS_M(4:0)
GFS_M(10:8)
0x03
MPC_M(2:0)
MPS_M(9:5)
0x04
ORS_M(0)
MPC_M(9:3)
0x05
OFS_M(6:0)
ORS_M(1)
0x06
OFC_M(1:0)
ORC_M
OFS_M(10)*
OFS_M(9:7)
0x07
OFC_M(9:2)
0x08
PH_M(6:0)
OFC_M(10)*
0x09
PH_M(9)*
PH_M(8:7)
Signal Conditioning Master Channel and Analog Parameters
0x0A
1
DCPOS
REFVOS
TUIN
RIN
0x0B
CVREF
0
0x0C
ACOT_M(0)
ACOR_M(1:0)
ACOC_M(4:0)
0x0D
CFGTA(2:0)
CFGIBP(3:0)
0x0E
ENF(1:0)
UIN
BYP
1
ACOT_M(1)
CFGTA(4:3)
0x0F
*) MSB and signum respectively.
Table 5: Register layout