IC-MN_16 Datasheet, PDF(37/62 Page) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

IC-MN_16 Datasheet, PDF (37/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

◁

iC-MN 25-BIT NONIUS ENCODER

WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

Rev F2, Page 37/62

Output Options

ESSI

Code

Addr. 0x3F; bit 5

Error bit output

Not included

Error bit enabled

Table 53: Error bit

RSSI

Code

Notes

Addr. 0x3F; bit 4

Ring operation

Normal output

If the clock count exceeds the data length, zero bits

are supplied.

Ring operation

When enabling RSSI with the BiSS C protocol, pin

SLI reads in data to be output via SLO.

Table 55: Ring operation

The format option Gray or binary code covers the MT

and ST data word in its entirety; filled in zeros and the

error bit remain untouched.

GRAY_SCD

Addr. 0x3F; bit 7

Code

Data format

Binary coded

Gray coded

Table 54: Data format (covers MT and ST data)

The behavior of the output data depending on the sense

of rotation can be altered using pin DIR or via register

DIR. Both signals are EXOR-gated and switch output

data from increasing to decreasing values or vice versa.

DIR

Code

Addr. 0x40; bit 5

Code direction

Not inverted

Inverted

Table 56: Code direction up/down

▷