IC-MN_16 Datasheet, PDF (25/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev F2, Page 25/62
be configured in such a way that the AC fraction is
minimal with both voltages.
MPS_M
MPS_S
MPS_N
Code
0x000
0x001
...
0x3FF
Addr. 0x03; bit 4:0
Addr. 0x02; bit 7:3
Addr. 0x13; bit 4:0
Addr. 0x12; bit 7:3
Addr. 0x23; bit 4:0
Addr. 0x22; bit 7:3
SVDC = (1 − ks) · V(PSi) + ks · V(NSi)
ks = 0.3333
ks = 0.3336
...
ks = 0.6666
Table 20: Intermediate voltage sine
ORC_M
ORC_S
ORC_N
Code
0
1
2
3
Addr. 0x06; bit 5:4
Addr. 0x16; bit 5:4
Addr. 0x26; bit 5:4
Range
maxVOSC_x = 3 * REFVOS
maxVOSC_x = 6 * REFVOS
maxVOSC_x = 18 * REFVOS
maxVOSC_x = 36 * REFVOS
Table 23: Offset range cosine
The achievable angle accuracy following interpolation
is affected by the internal signal strength and the offset
calibration step width, depending on the set correction
range and reference source. By way of example these
dependencies are shown in the following table, for half
and full scale signal levels (FS means 6 Vpp).
MPC_M
MPC_S
MPC_N
Code
0x000
0x001
...
0x3FF
Addr. 0x04; bit 6:0
Addr. 0x03; bit 7:5
Addr. 0x14; bit 6:0
Addr. 0x13; bit 7:5
Addr. 0x24; bit 6:0
Addr. 0x23; bit 7:5
CVDC = (1 − kc) · V(PCi) + kc · V(NCi)
kc = 0.3333
kc = 0.3336
...
kc = 0.6666
Table 21: Intermediate voltage cosine
The calibration range for the offset of sine and cosine
is dependent on the source selected by REFVOS and
is set using ORS_x (1:0) and ORC_x (1:0). The offset
correction accuracy is influenced with the above.
ORS_M
ORS_S
ORS_N
Code
0
1
2
3
Addr. 0x05; bit 0
Addr. 0x04; bit 7
Addr. 0x15; bit 0
Addr. 0x14; bit 7
Addr. 0x25; bit 0
Addr. 0x24; bit 7
Range
maxVOSS_x = 3 * REFVOS
maxVOSS_x = 6 * REFVOS
maxVOSS_x = 18 * REFVOS
maxVOSS_x = 36 * REFVOS
Range
x Source
maxVOSC_x Cal. Step
maxVOSS_x Width (LSB)
3 x 0.25 V 750 mV
6 x 0.25 V 1.5 V
6 x 0.5 V 3 V
18 x 0.5 V 9 V
732 µV
1465 µV
4396 µV
8789 µV
Limitation Of
Angle Accuracy
@ 100 % (6 Vpp)
@ 50 % (3 Vpp)
none (>13 bit)
none (>13 bit)
none (>13 bit)
none (>13 bit)
0.08°, ca. 12 bit
0.16°, ca. 11 bit
0.16°, ca. 11 bit
0.32°, ca. 10 bit
Table 24: Offset calibration and influence on angle ac-
curacy
The sine and cosine offsets are calibrated by a linear
voltage divider using OFS_x (10:0) and OFC_x (10:0).
OFS_M
OFS_S
OFS_N
Code
0x000
0x001
0x002
...
0x3FF
0x400
0x401
0x402
...
0x7FF
Addr. 0x06; bit 3:0
Addr. 0x05; bit 7:1
Addr. 0x16; bit 3:0
Addr. 0x15; bit 7:1
Addr. 0x26; bit 3:0
Addr. 0x25; bit 7:1
OFS_x = OffsS_x*maxVOSS_x
OffsS_x = 0
OffsS_x = -0.0009
OffsS_x = -0.0019
...
OffsS_x = -1
OffsS_x = 0
OffsS_x = 0.0009
OffsS_x = 0.0019
...
OffsS_x = 1
Table 22: Offset range sine
Table 25: Offset voltage sine