IC-MN_16 Datasheet, PDF (44/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev F2, Page 44/62
error register is compiled in which all messages are
stored which occur during operation. Only the current
errors can be read out via the status register (BiSS
addresses 0x75 to 0x77).
Note: Once configuration has been completed and be-
fore the system is delivered the data at the EEPROM
addresses 0x75 to 0x77 should be initialized with ze-
roes.
The cumulative errors which are stored at EEPROM
addresses 0x75 to 0x77 can only be read out via BiSS
with CFG_E2P > 000 and PROT_E2P = 00 to bank 1,
address 0x35-0x37 (see page 54 ff. for memory map).
E2EPR
Code
0
1
Addr. 0x41; bit 7
Description
Disabled
EEPROM savings of cumulative status messages
enabled
Table 76: Diagnosis memory enable