English
Language : 

IC-MN_16 Datasheet, PDF (29/62 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
SINE-TO-DIGITAL CONVERSION MODES
Rev F2, Page 29/62
iC-MN has two principle modes of operation. In nonius
modes 2 or 3 tracks are combined by a nonius calcu-
lation with synchronization; in multiturn modes the up
to 3 tracks are combined to form an absolute word via
gear box code synchronization.
The used and synchronization bit lengths (parameters
UBL_x and SBL_x) are selectable for both operating
modes; in multiturn modes it is also possible to output
unsynchronized data from all tracks.
Internal Bit Lengths
The used bit length is set for the master, segment
and nonius tracks using registers UBL_M, UBL_S and
UBL_N. From these used bits the internal singleturn
data word is then generated, for which purpose syn-
chronization bits are used. The bit lengths used for syn-
chronization can be set separately via register SBL_S
for the segment track and register SBL_N for the nonius
track. Limitations governing the settable bit lengths are
summarized in Table 41.
With both principle operating modes iC-MN offers vari-
ous sine-to-digital conversion modes. With a data re-
quest via the I/O interface this determines:
• The sample time and thus the ”age” of the output
data
• The necessary processing time prior to genera-
tion of the output data word.
UBL_M
Code
0x00
0x01..0x03
0x04
...
0x0D
Addr. 0x3B; bit 5:2
Bit length master
0
not permitted
4
...
13
Table 38: Bit length master
UBL_S
UBL_N
Code
0x00
...
0x0D
Addr. 0x3C; bit 1:0
Addr. 0x3B; bit 7:6
Addr. 0x3D; bit 0
Addr. 0x3C; bit 7:5
Used bit length
0
...
13
Table 39: Used bit length for segment and nonius
SBL_S
SBL_N
Code
0x00
...
0x04
Addr. 0x3C; bit 4:2
Addr. 0x3D; bit 3:1
Synchronization bit length
0
...
4
Table 40: Synchronization segment and nonius
Track
Master
Segment
Nonius
Count of bits processed
UBL_M
UBL_S+SBL_S
UBL_N+SBL_N
Possible bit count
0, 4..13
0, 4..13
0, 4..13
Table 41: Possible bit counts for
UBL_M and UBL_x+SBL_x