H27UAG8T2B Datasheet, PDF (47/61 Pages) Hynix Semiconductor – 16Gb (2048M x 8bit) NAND Flash

Release
H27UAG8T2B Series
16Gb (2048M x 8bit) NAND Flash
with destination page address. Actual programming operation begins after Program Confirm command (10h) is issued.
Once the program process starts, the Read Status Register command (70h) may be entered to read the status register.
The system controller can detect the completion of a program cycle by monitoring the R/B# output, or the Status bit
(I/O 6) of the Status Register. When the Copy-Back Program is complete, the Write Status Bit (I/O 0) may be checked.
The command register remains in Read Status command mode until another valid command is written to the com-
mand register. During copy-back program, data modification is possible using random data input command (85h) as
shown in Figure 45.
■ Figure 45. Copyback program
Source Address
I/Ox
00h
Address
(5 cycle)
35h
R/B#
t_R
A
Data output
A
Target Address
Column
address 1,2
I/Ox
85h
Address
(5 cycle)
Data
85h
Address
(2 cycle)
Data
10h
R/B#
t_PROG
70h Status
4.12. Multi Plane Copy-Back Program
Multi plane Copy-Back Program is an extension of Copy-Back Program, for a single plane with 8,640 byte page regis-
ters. Since the device is equipped with two memory planes, activating the two sets of 8,640-byte page registers
enables a simultaneous programming of two pages. Figure 46 and Figure 47 show command sequence for the Multi
Plane copy-back operation. First case, Figure 46, shows random data input of two planes that started right after finish-
ing random data output of previous two planes. Second case, Figure 47, shows the random data input of each plane
which started right after finishing the random data output of each Plane.
Rev 1.0 / Aug. 2010
47