H27UAG8T2B Datasheet, PDF (22/61 Pages) Hynix Semiconductor – 16Gb (2048M x 8bit) NAND Flash

3. Timing Diagram
Release
H27UAG8T2B Series
16Gb (2048M x 8bit) NAND Flash
Bus Operation
There are six standard bus operations that control the device. These are Command Input, Address Input, Data Input,
Data Output, Write Protect, and Standby.
3.1. Command Latch Cycle Timings
■ Figure 6. Command latch timings
CLE
CE#
WE#
ALE
I/Ox
t _CLS
t_CLH
t _CS
t _CH
t_WP
t_ALS
t _ALH
t _DS
t _DH
Command
: Don’t care
Note:
All commands except Reset, Read Status, and Multi Plane Read Status are issued to command register on the rising edge of WE#,
when CLE is high, CE# and ALE is low, and device is not busy state
Rev 1.0 / Aug. 2010
22