H27UAG8T2B Datasheet, PDF (10/61 Pages) Hynix Semiconductor – 16Gb (2048M x 8bit) NAND Flash

Release
H27UAG8T2B Series
16Gb (2048M x 8bit) NAND Flash
1.7. Command Set
FUNCTION
1st
Cycle
Number
of
Address
cycles
Data
input
cycles
2nd
Cycle
Number
of
Address
cycles
Data
input
cycles
PAGE READ
00h
5
-
30h
-
-
READ FOR COPY-BACK
00h
5
-
35h
-
-
RANDOM DATA OUTPUT¹⁾
05h
2
-
E0h
-
-
SINGLE/multi plane CACHE READ^{5) 31h}
-
-
-
-
-
SINGLE/multi plane CACHE READ
END⁵⁾
3Fh
-
-
-
-
-
READ ID
90h
1
-
-
-
-
READ STATUS REGISTER
70h
-
-
-
-
-
PAGE PGM (start) / CACHE PGM
5)_(end)
80h
5
Yes
10h
-
-
RANDOM DATA INPUT ¹⁾
85h
2
Yes
-
-
-
COPY-BACK PGM
85h
5
option 10h
-
-
CACHE PGM (start) ⁵⁾
80h
5
Yes
15h
-
-
BLOCK ERASE
60h
3
-
D0h
-
-
RESET
FFh
-
-
-
-
multi plane PAGE READ
60h
3
-
60h
3
-
multi plane CACHE READ START^{5) 60h}
3
-
60h
3
-
multi plane READ FOR COPY-BACK 60h
multi plane BLOCK ERASE
60h
multi plane DATA OUTPUT ^{1) 3)}
00h
multi plane READ STATUS REGIS-
TER
78h
multi plane PAGE PGM
/ multi plane CACHE PGM (end)
80h
multi plane COPY-BACK PGM
85h
multi plane CACHE PGM (start) ^{5) 80h}
User OTP ENTRY COMMAND
04h
Unique ID READ ENTRY COMMAND 02h
Unique ID PGM ENTRY COMMAND 84h
READ ID2 ENTRY COMMAND
30h
3
-
60h
3
3
-
60h
3
5
-
05h
2
3
-
-
-
5
Yes ^11h~81h
5
2)
5
option ^11h~81h
5
2)
5
Yes ^11h~81h
5
2)
19h
19h
97h
65h
-
-
-
-
Yes
option
Yes
3rd
Cycle
-
-
Accept-
able com-
mand
during
busy
No
No
-
No
-
No
-
No
-
No
-
Yes
-
No
-
No
-
No
-
No
-
No
-
Yes
30h
No
30h/
33h
No
35h
No
D0h
No
E0h
No
-
Yes
10h
No
10h
No
15h
No
No
No
08h
No
No
Notes:
1. Random Data Input/Output must be performed in a selected page.
2. Any command between 11h and 81h is prohibited except 70h, 78h, and FFh.
3. Multi Plane Random data-out must be used after Multi Plane read operations (Multi Plane Page Read, Multi Plane
Cache Read and Multi Plane Read for Copy Back).
4. Do not change Plane address order when using all Multi Plane operations.
5. All cache operation (cache program, cache read) is available only within a block.
6. Interleave operation between two chips are allowed. Multi Plane Read Status (78h) can be used to check each chip
status. It is prohibited to use Read Status command (70h) in interleaved operation.
Rev 1.0 / Aug. 2010
10