HY5PS1G821M Datasheet, PDF (45/79 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM(DDP)

1HY5PS12421(L)M
HY5PS12821(L)M
Example 3: Burst Read with Auto Precharge Followed by an activation to the Same
Bank(tRC Limit):
RL = 5 (AL = 2, CL = 3, internal tRCD = 3, BL = 4, t_RTP <= 2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
A10 = 1
CMD ^{Post CAS}
READ A
DQS/DQS
DQ’s
NOP
NOP
> = tRAS(min)
NOP
NOP
NOP
Auto Precharge Begins
NOP
NOP
AL = 2
RL = 5
CL =3
> = t_RC
> = t_RP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
CL =3
Bank A
Activate
Example 4: Burst Read with Auto Precharge Followed by an Activation to the Same
Bank(tRP Limit):
RL = 5 (AL = 2, CL = 3, internal tRCD = 3, BL = 4, t_RTP <= 2 clocks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
A10 = 1
CMD
Post CAS
READ A
DQS/DQS
DQ’s
NOP
NOP
> = tRAS(min)
NOP
NOP
NOP
Auto Precharge Begins
NOP
Bank A
Activate
AL = 2
RL = 5
CL =3
> = t_RC
> = t_RP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
CL =3
NOP
Rev. 0.2 / Oct. 2005
45