HY5PS1G821M Datasheet, PDF (40/79 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM(DDP)

1HY5PS12421(L)M
HY5PS12821(L)M
Example 3: Burst Read Operation Followed by Precharge:
RL = 5, AL = 2, CL = 3, BL = 4, t_RTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD ^{Posted CAS}
READ A
NOP
NOP
AL + BL/2 clks
NOP
Precharge A
NOP
NOP
Bank A
Activate
DQS/DQS
DQ’s
AL = 2
RL =5
CL =3
> = t_RAS
> = t_RTP
> = t_RP
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
CL =3
NOP
Example 4: Burst Read Operation Followed by Precharge:
RL = 6, AL = 2, CL = 4, BL = 4, t_RTP <= 2 clocks
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK/CK
CMD
Post CAS
READ A
DQS/DQS
DQ’s
NOP
NOP
AL + BL/2 Clks
NOP
Precharge A
NOP
NOP
Bank A
Activate
NOP
AL = 2
RL = 6
CL =4
> = t_RAS
> = t_RTP
> = t_RP
CL =4
DOUT A₀ DOUT A₁ DOUT A₂ DOUT A₃
Rev. 0.2 / Oct. 2005
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