K61P256M120SF3_1210 Datasheet, PDF (92/94 Pages) Freescale Semiconductor, Inc – K61 Sub-Family

Pinout
8.3 K61 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A DDR_VSS DDR_DQ15 DDR_DM1 DDR_DQ2 DDR_VSS DDR_DQ5 DDR_ODT DDR_DQ7 DDR_BA0 DDR_CKB DDR_CK DDR_VSS DDR_A5 DDR_A6 DDR_A8 DDR_VSS A
B DDR_VDD DDR_DQ11 DDR_DQ14 DDR_DQ1 DDR_VDD DDR_DQ3 DDR_DQ6 DDR_VDD DDR_BA2 DDR_BA1 DDR_A2 DDR_VDD DDR_A10 DDR_A11 DDR_A9 DDR_CKE B
C DDR_DQ9 DDR_DQ10 DDR_DQ12 DDR_DQ13 DDR_DQ0 DDR_VREF DDR_VSS DDR_DQS0 DDR_VSS DDR_A4 DDR_A1 DDR_A3
DDR_ _{DDR_VSS DDR_A12 DDR_VDD C}
CAS_B
D DDR_DQ8 DDR_VDD DDR_DQS1 DDR_VDD DDR_VSS DDR_DQ4 DDR_VDD DDR_VSS DDR_DM0 DDR_A0 DDR_A7 DDR_VSS DDR_WE_B DDR_CS_B DDR_A14 DDR_A13 D
E PTF16
PTE0 DDR_VSS PTD15
PTD14
PTD10
PTD7
DDR_VSS
PTC17
DDR_VDD
DDR_VSS
DDR_VDD
PTC3/
LLWU_P7
PTC4/
LLWU_P8
PTC5/
LLWU_P9
DDR_
RAS_B
E
F
PTF17
PTE1/
PTE2/
LLWU_P0 LLWU_P1
PTD13
PTD12
PTF15
PTD9
PTD1
PTC16
PTC15
PTC9
PTC6/
PTC1/
LLWU_P10 LLWU_P6
PTC2
PTF7
PTF8
F
G PTF18
PTE3
PTE4/
LLWU_P2
PTE5
PTD11
PTF14
VDD
VDD
VDD
VDD
PTC10
PTC7
PTB20
PTB21
PTB22
PTC0
G
H PTF19
PTE6
PTE7
PTE8
PTF20
PTF13 VDDINT
VSS
VSS
VDDINT
PTC11/
LLWU_P11
PTC8
PTB17
PTB18
PTB19
PTB23 H
J
PTE9
PTE10
PTE16
PTD8
PTD5
PTD3
VDD
VSS
VSS
VDD
PTC14
PTC12
PTB10
PTB11
PTB16
PTF6
J
K PTE11
PTE17
PTE12
PTD6/
PTD4/
PTD2/
LLWU_P15 LLWU_P14 LLWU_P13
PTE27
VSS
VSS
VDD
PTF11
PTF9
PTC13
PTB8
PTB9
PTF5
K
L VOUT33
VSS
VREGIN
PTE18
TAMPER1 TAMPER2
PTE28
PTD0/
LLWU_P12
VSS
VDD
PTF12
PTF10
PTF1
PTB6
PTB7
PTF4
L
M USB0_DP USB0_DM PTE19
VREFL
TAMPER0/
RTC_ TAMPER7
WAKEUP_B
PTE26
PTC19
PTC18
PTA12
PTB1
PTB0/
LLWU_P5
PTA26
N
PGA2_DP/
ADC2_DP0/
ADC3_DP3/
ADC0_DP1
AAAPDDDGCCCA2302____DDDDMMMM031///AACDDMCCP001___SSIENE12261/ ^/
VSSA
VDDA TAMPER6
P
PGA3_DP/
ADC3_DP0/
ADC2_DP3/
ADC1_DP1
AAAPDDDGCCCA3213____DDDDMMMM031///AACDDMCCP102___SSIENE12262/ ^/
VREFH
VBAT TAMPER4
R
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
ADCDAMCCP001___SOINEU23T3// _{ADCCDAMMCCPP1102____SOIINNEU243T3///}
TAMPER3
TAMPER5
T
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VSS
EXTAL32 XTAL32
1
2
3
4
5
6
VSS
PTE24
PTE25
PTA0
7
PTA1
PTA3
PTA4/
LLWU_P3
PTA2
8
PTF22
PTF21
PTF25
PTF26
9
PTA13/
LLWU_P4
PTF23
PTF24
PTF27
10
PTA16
PTA15
PTA14
PTA17
11
PTA8
PTA7
PTA6
PTA5
12
PTA24
PTA10
PTA11
PTA9
13
PTB3
PTA29
PTA28
PTA25
VSS
14
PTB5
PTF3
M
PTB4
PTF2
N
PTB2
PTF0
P
PTA27 RESET_b R
PTA18
PTA19 T
15
16
Figure 43. K61 256 MAPBGA Pinout Diagram
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
92
Freescale Semiconductor, Inc.