K61P256M120SF3_1210 Datasheet, PDF (19/94 Pages) Freescale Semiconductor, Inc – K61 Sub-Family

Table 6. Power consumption operating behaviors (continued)
Symbol
I_{DD_STOP}
Description
Stop mode current at 3.0 V
• @ –40 to 25°C
• @ 70°C
• @ 105°C
Min.
Typ.
Max.
Unit
—
1.3
3.8
mA
—
3.0
27
mA
—
7.5
42
mA
I_{DD_VLPR} Very-low-power run mode current at 3.0 V — all
—
peripheral clocks disabled
I_{DD_VLPR} Very-low-power run mode current at 3.0 V — all
—
peripheral clocks enabled
I_{DD_VLPW} Very-low-power wait mode current at 3.0 V
—
I_{DD_VLPS} Very-low-power stop mode current at 3.0 V
• @ –40 to 25°C
—
• @ 70°C
—
• @ 105°C
—
1.4
32
mA
2.2
38
mA
0.926
22
mA
0.25
1.3
mA
0.85
7.6
mA
2.4
12.54
mA
I_{DD_LLS}
Low leakage stop mode current at 3.0 V
• @ –40 to 25°C
• @ 70°C
• @ 105°C
—
0.25
1.3
mA
—
0.85
7.6
mA
—
2.4
12.54
mA
I_{DD_VLLS3} Very low-leakage stop mode 3 current at 3.0 V
• @ –40 to 25°C
—
5.6
20
μA
• @ 70°C
—
30.1
137
μA
• @ 105°C
—
120.8
246
μA
I_{DD_VLLS2} Very low-leakage stop mode 2 current at 3.0 V
• @ –40 to 25°C
—
3.2
14
μA
• @ 70°C
—
11.8
40
μA
• @ 105°C
—
51.2
60
μA
I_{DD_VLLS1} Very low-leakage stop mode 1 current at 3.0 V
• @ –40 to 25°C
—
2.8
12
μA
• @ 70°C
—
8.7
29
μA
• @ 105°C
—
39.3
43
μA
I_{DD_VBAT} Average current when CPU is not accessing RTC
registers at 3.0 V
• @ –40 to 25°C
—
0.91
1.1
μA
• @ 70°C
—
1.5
1.85
μA
• @ 105°C
—
4.3
4.3
μA
General
Notes
5
6
7
8
8
9
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
each module's specification for its supply current.
2. 120 MHz core and system clock, 60 MHz bus, 30 MHz FlexBus clock, and 20 MHz flash clock. MCG configured for PEE
mode. All peripheral clocks disabled.
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
Freescale Semiconductor, Inc.
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