MC68HC11E0CFNE3 Datasheet, PDF (79/242 Pages) Freescale Semiconductor, Inc – M68HC11E Family

Chapter 5
Resets and Interrupts
5.1 Introduction
Resets and interrupt operations load the program counter with a vector that points to a new location from
which instructions are to be fetched. A reset immediately stops execution of the current instruction and
forces the program counter to a known starting address. Internal registers and control bits are initialized
so the MCU can resume executing instructions. An interrupt temporarily suspends normal program
execution while an interrupt service routine is being executed. After an interrupt has been serviced, the
main program resumes as if there had been no interruption.
5.2 Resets
The four possible sources of reset are:
• Power-on reset (POR)
• External reset (RESET)
• Computer operating properly (COP) reset
• Clock monitor reset
POR and RESET share the normal reset vector. COP reset and the clock monitor reset each has its own
vector.
5.2.1 Power-On Reset (POR)
A positive transition on V_DD generates a power-on reset (POR), which is used only for power-up
conditions. POR cannot be used to detect drops in power supply voltages. A 4064 t_CYC (internal clock
cycle) delay after the oscillator becomes active allows the clock generator to stabilize. If RESET is at
logical 0 at the end of 4064 t_CYC, the CPU remains in the reset condition until RESET goes to logical 1.
The POR circuit only initializes internal circuitry during cold starts. Refer to
Figure 1-7. External Reset Circuit.
NOTE
It is important to protect the MCU during power transitions. Most M68HC11
systems need an external circuit that holds the RESET pin low whenever
V_DD is below the minimum operating level. This external voltage level
detector, or other external reset circuits, are the usual source of reset in a
system.
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
79