MC68HC11E0CFNE3 Datasheet, PDF (73/242 Pages) Freescale Semiconductor, Inc – M68HC11E Family

Instruction Set
Table 4-2. Instruction Set (Sheet 2 of 7)
Mnemonic
Operation
Description
Addressing
Mode
Instruction
Condition Codes
Opcode Operand Cycles S X H I N Z V C
BGT (rel) Branch if > Zero ? Z + (N ⊕ V) = 0
REL
2E rr
3
————————
BHI (rel)
Branch if
?C+Z=0
REL
22 rr
3
————————
Higher
BHS (rel)
Branch if
Higher or Same
?C=0
REL
24 rr
3
————————
BITA (opr)
Bit(s) Test A
with Memory
A•M
A
IMM
85 ii
A
DIR
95 dd
A
EXT
B5 hh ll
A
IND,X
A5 ff
A
IND,Y 18
A5 ff
2
———— ∆ ∆ 0 —
3
4
4
5
BITB (opr)
Bit(s) Test B
with Memory
B•M
B
IMM
C5 ii
B
DIR
D5 dd
B
EXT
F5 hh ll
B
IND,X
E5 ff
B
IND,Y 18
E5 ff
2
———— ∆ ∆ 0 —
3
4
4
5
BLE (rel) Branch if ∆ Zero ? Z + (N ⊕ V) = 1
REL
2F rr
3
————————
BLO (rel) Branch if Lower
?C=1
REL
25 rr
3
————————
BLS (rel) Branch if Lower
?C+Z=1
REL
23 rr
3
————————
or Same
BLT (rel) Branch if < Zero
?N⊕V=1
REL
2D rr
3
————————
BMI (rel) Branch if Minus
?N=1
REL
2B rr
3
————————
BNE (rel)
Branch if not =
Zero
?Z=0
REL
26 rr
3
————————
BPL (rel) Branch if Plus
?N=0
REL
2A rr
3
————————
BRA (rel) Branch Always
?1=1
REL
20 rr
3
————————
BRCLR(opr)
(msk)
(rel)
Branch if
Bit(s) Clear
? M • mm = 0
DIR
IND,X
IND,Y 18
13 dd mm
1F rr
1F ff mm
6
————————
7
8
rr
ff mm
rr
BRN (rel) Branch Never
?1=0
REL
21 rr
3
————————
BRSET(opr) Branch if Bit(s)
(msk)
Set
(rel)
? (M) • mm = 0
DIR
IND,X
IND,Y 18
12 dd mm
1E rr
1E ff mm
6
————————
7
8
rr
ff mm
rr
BSET (opr)
(msk)
Set Bit(s)
M + mm ⇒ M
DIR
IND,X
IND,Y 18
14 dd mm
1C ff mm
1C ff mm
6
———— ∆ ∆ 0 —
7
8
BSR (rel)
Branch to
See Figure 3–2
REL
Subroutine
8D rr
6
————————
BVC (rel)
Branch if
Overflow Clear
?V=0
REL
28 rr
3
————————
BVS (rel)
Branch if
Overflow Set
?V=1
REL
29 rr
3
————————
CBA
Compare A to B
A–B
INH
11
—
2
———— ∆ ∆ ∆ ∆
CLC
Clear Carry Bit
0⇒C
INH
0C
—
2
——————— 0
CLI
Clear Interrupt
Mask
0⇒I
INH
0E
—
2
——— 0 ————
CLR (opr)
Clear Memory
Byte
0⇒M
EXT
IND,X
IND,Y 18
7F hh ll
6F ff
6F ff
6
———— 0 1 0 0
6
7
CLRA
Clear
Accumulator A
0⇒A
A
INH
4F
—
2
———— 0 1 0 0
CLRB
Clear
Accumulator B
0⇒B
B
INH
5F
—
2
———— 0 1 0 0
CLV
Clear Overflow
Flag
0⇒V
INH
0A
—
2
—————— 0 —
CMPA (opr) Compare A to
Memory
A–M
A
IMM
81 ii
A
DIR
91 dd
A
EXT
B1 hh ll
A
IND,X
A1 ff
A
IND,Y 18
A1 ff
2
———— ∆ ∆ ∆ ∆
3
4
4
5
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
73