33889 Datasheet, PDF (52/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 33. Status bits:
Status bit
Description
CANF
CAN failure
VDDTEMP
VDD medium temperature
HS1OT
HS1 over temperature
VSUPLOW
V_SUP below 6.1V typical
Notes:
Bit D2 = 1: INT source is HS1OT
If HS1OT-V2LOW interrupt is only selected (only bit D2 set
in INTR register), reading INTR register bit D2 leads to two
possibilities:
Bit D2 = 0: INT source is V2LOW.
Upon a wake-up condition from stop mode due to over current detection (I_DD1S-WU1 or I_DD1S-WU2), an INT pulse is generated,
however INTR register contain remains at 0000 (not bit set into the INTR register).
33889
52
Analog Integrated Circuit Device Data
Freescale Semiconductor