33889 Datasheet, PDF (34/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
In application, with CAN communication, a recovery
condition is detected after 4 acknowledge bits are sent by the
MC33889B.
MC33889D:
When detection is complete, the counter is decremented
by sampling the dominant pulse (recovery pulse) on S-H (S-
L), and incremented (up to 4) by sampling the recessive pulse
(detection pulses) on S-H (S-L). It is necessary to get 4
consecutive dominant samples (recovery pulse) to get to
zero. When reaching zero, the failure is recovered.
In application with real CAN communication, a recovery
condition will not be detected by a single acknowledge bit
send by MC33889D, but requires a complete CAN message
(at least 4 dominant bits) send in dual wire mode, without
reception of any bit in single wire mode.
Tx permanent dominant detection:
In addition to the previous list, the MC33889 detects a
permanent low state at the TX input which results in a
permanent dominant bus state. If TX is low for more than
0.75-4ms, the bus output driver is disabled. This avoids
blocking communication between other nodes of the network.
TXD is reported via the SPI (RCR register bit D1:
TXFAILURE). Tx permanent dominant recovery is done with
TX recessive for more than typ 32us.
Rx pin behavior while CAN interface is in TermVbat.
The MC33889D is able to signal bus activity on Rx while
the CAN interface is in TermVbat and the SBC in normal or
standby mode. When the bus is driven into a dominant state
by another sending node, each dominant state is reported at
Rx by a low level, after a delay of T_WAKE.
The bus state report is done through the CAN interface
wake up comparator on CANL and CANH, and thus operates
also in case of bus failure. This is illustrated in the following
figure.
33889
34
Analog Integrated Circuit Device Data
Freescale Semiconductor