33889 Datasheet, PDF (36/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The following table summarizes the device behavior when a CAN Wake Up event occurs.
Table 6. Summary of RX Pin Operations for Wake up Signaling
SBC mode
CAN state
MC33889B
MC33889D
Normal
Standby
Sleep
Stop
TermVbat
TermVbat
TermVbat
TermVbat
no event on RX, no bit set
no event on RX, no bit set
SBC mode transition to Normal
request, bit CANWU set
INT pulse, bit CANWU set
RX pulse (1), bit CANWU is not set
RX pulse (1), bit CANWU is not set
SBC mode transition to Normal
request, bit CANWU set
Int pulse, bit CANWU set
Notes
29. pulse duration is bus dominant duration minus Twake.
GND SHIFT DETECTION
GENERAL
When normally working in two-wire operating mode, the
CAN transmission can afford some ground shift between
different nodes without trouble. Should a bus failure occur, the
transceiver switches to single-wire operation, therefore
working with less noise margin. The affordable ground shift is
decreased.
The SBC provides a ground shift detection for diagnosis
purpose. The four ground shift levels are selectable and the
detection is stored in the IOR register which is accessible via
the SPI.
Table 7. 33889 Table of Operations
The table below describe the SBC operation modes.
DETECTION PRINCIPLE
The gnd shift to detect is selected via the SPI from 4
different values (-0.3 V, -0.7 V, -1.2 V, -1.7 V). At each TX
falling edge (end of recessive state), the CANH voltage is
sensed. If it is detected to be below the selected gnd shift
threshold, the bit SHIFT is set at 1 in the IOR register. No filter
is implemented. Required filtering for reliable detection
should be done by software (e.g. several trials).
DEVICE STATE DESCRIPTION
MODE
VOLTAGE
REGULATOR
HS1 SWITCH
WAKE-UP
CAPABILITIES
(IF ENABLED)
RESET PIN
INT
SOFTWARE
WATCHDOG
CAN CELL
Normal Request
VDD1: ON
V2: OFF
HS1: OFF
Low for 1ms, then
high
term Vbat
Normal
VDD1: ON
V2: ON
HS1 controllable
Normally high.
Active low if W/D
or VDD1 under
voltage occur
If enabled,
signal failure
(VDD pre
warning temp,
CAN, HS1)
Running
Term Vbat
Tx/Rx
Rec only
Standby
VDD1: ON
V2: OFF
HS1 controllable
Normally high.
Active low if W/D
or VDD1 under
voltage occur
If enabled,
signal failure
(VDD temp,
HS1)
Running
Term Vbat
Tx/Rx
Rec only
Stop
VDD1: ON
(limited current
capability)
V2: OFF
HS1: OFF or cyclic
CAN (always enable)
SPI and L0,L1
Cyclic sense or
Forced Wake-up
Normally high.
Active low if W/D
or VDD1 under
voltage occur
Signal SBC
wake-up
- Running if
enabled
(not maskable) - Not Running
if disabled
Term Vbat.
33889
36
Analog Integrated Circuit Device Data
Freescale Semiconductor