33889 Datasheet, PDF (47/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 21. Status bits
Status bit
HS1OT (*)
SHIFT
V2LOW
VSUPLOW
Description
High-side 1 over temperature
gnd shift level selected by GSLR1 and GSLR2 bits is reached
V2 below 4.0 V typical
V_SUP below 6.1 V typical
(*) Once the HS1 switch has been turned off because of over temperature, it can be turned on again by setting the appropriate
control bit to “1”.
WUR REGISTER
The local wake-up inputs L0 and L1 can be used in both normal and standby mode as port expander and for waking up the
SBC in sleep or stop mode.
Table 22. WUR Register
WUR
D3
D2
D1
D0
$100b
W
LCTR3
R
L1WUb
Reset
1
LCTR2
L1WUa
1
LCTR1
L0WUb
1
LCTR0
L0WUa
1
Reset condition
POR, NR2R, N2R, STB2R, STO2R
Table 23. Control bits:.
LCTR3
X
X
X
X
0
0
1
1
LCTR2
X
X
X
X
0
1
0
1
LCTR1
0
0
1
1
X
X
X
X
LCTR0
0
1
0
1
X
X
X
X
L0 configuration
inputs disabled
high level sensitive
low level sensitive
both level sensitive
L1 configuration
inputs disabled
high level sensitive
low level sensitive
both level sensitive
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
47