33889 Datasheet, PDF (37/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Table 7. 33889 Table of Operations
The table below describe the SBC operation modes.
MODE
VOLTAGE
REGULATOR
HS1 SWITCH
WAKE-UP
CAPABILITIES
(IF ENABLED)
RESET PIN
Sleep
VDD1: OFF
CAN (always enable
Low
V2: OFF
SPI and L0,L1
HS1 OFF or cyclic
Cyclic sense
Forced Wake-up
INT
SOFTWARE
WATCHDOG
CAN CELL
Not active No Running Term Vbat.
Reset
Power
Down
State Machine (not valid in debug modes)
W/D: timeout OR VDD1 low
W/D: timeout & Nostop & !BATFAIL
Reset counter
(1 ms) expired
2
Normal Request
SPI: standby &
W/D trigger
(note1)
3
1
W/D:
timeout
VDD1 low OR W/D: time
out 350 ms & !Nostop
OR _{VDD1 low (note2)}
2
4
to
SPhI:igShtotpra&ns^{CitiSonlowW/D: Trigger}
1
Standby
1
Stop
W/D: timeout OR VDD1 low
SPI: Stop & CS
low to high
transition
Normal
1
Wake-up
(VDD1 high temperature OR (VDDd1 low > 100 ms & VSUP >BFew)) & Nostop & !BATFAIL
Sleep
1 2 3 4 ^{denotes priority}
State machine description:
“Nostop” means Nostop bit = 1
“! Nostop” means Nostop bit = 0
“BATFAIL” means Batfail bit = 1
“! BATFAIL” means Batfail bit = 0
“VDD1 over temperature” means VDD1 thermal shutdown occurs
“VDD1 low” means VDD1 below reset threshold
“VDD1 low > 100 ms” means VDD1 below reset threshold for more than
100 ms
“W/D: Trigger” means TIM1 register write operation.
VSUP > BFew means VSUP > Battery Fall Early Warning (6.1 V typical)
“W/D: timeout” means TIM1 register not written before W/D timeout period
expired, or W/D written in incorrect time window if window W/D selected
(except stop mode). In normal request mode timeout is 355 ms p2.2 (350 ms
p3)ms.
“SPI: Sleep” means SPI write command to MCR register, data sleep
“SPI: Stop” means SPI write command to MCR register, data stop
“SPI: Normal” means SPI write command to MCR register, data normal
“SPI: Standby” means SPI write command to MCR register, data standby
Note 1: these 2 SPI commands must be send in this sequence and
consecutively.
Note 2: if W/D activated
Figure 16. Simplified State Machine
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
37